1. Field of Invention
The present invention relates generally to a semiconductor package, and more particularly, to a substrate for a semiconductor package, a semiconductor package using the same, and a manufacturing method thereof.
2. Description of the Related Art
As electronic devices are becoming more compact with more capabilities, a packaging technology for mounting a semiconductor apparatus is also required for high speed, high performance, and high density mounting. In order to meet such requirements, a flip chip mounting technology for mounting a chip in the type of a chip scale package has been suggested.
The flip chip mounting technology comprises of not packaging a semiconductor chip and rather mounting the semiconductor chip itself onto a substrate. The substrate and the semiconductor chip are soldered to each other by bumps which are correspondingly disposed over connection pads formed on the substrate.
In order to prevent a solder joint crack which is likely to occur due to an external shock or a difference in coefficient of thermal expansion, an underfill layer may be formed by introducing an underfill member of a liquid phase between the semiconductor chip and the substrate and then setting the introduced underfill member.
In this regard, in the conventional art, when bonding a semiconductor chip formed with bumps onto a substrate by applying an NCP (non-conductive paste) or an NCF (non-conductive film), 1 to 2 minutes are required to complete a process of aligning the semiconductor chip on the substrate, performing die bonding, and then applying heat and pressure. Thus, in order to bond a plurality of semiconductor chips, a corresponding lengthy period is required. In particular, when bonding a semiconductor chip which adopts TSVs (through-silicon vias), additional time is required.